Performance investigation on the reconfigurable Si nanowire schottky barrier transistors

Juncheng Wang; Gang Du; Zhiyuan Lun; Kangliang Wei; Lang Zeng; Xiaoyan Liu

doi:10.1109/ICSICT.2012.6467586

Performance investigation on the reconfigurable Si nanowire schottky barrier transistors

Juncheng Wang^*
, Gang Du
, Zhiyuan Lun
, Kangliang Wei
, Lang Zeng
, Xiaoyan Liu

^*Corresponding author for this work

Peking University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In this paper, the performance of the reconfigurable Si nanowire schottky barrier transistors (RFETs) is investigated with simulation method. In contrast to conventional Schottky barrier MOSFETs (SB-MOSFETs) and silicon nanowire transistors (Si-NWTs) with metal/silicide as source/drain, the separate two gates in RFETs are located at the two Schottky junctions. Our simulation results show the variable electric characteristics and working principle of the RFETs working as p-/n-type. The RFETs exhibit higher on/off current ratio compared with other Schottky transistors.

Original language	English
Title of host publication	ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
DOIs	https://doi.org/10.1109/ICSICT.2012.6467586
State	Published - 2012
Externally published	Yes
Event	2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012 - Xi'an, China Duration: 29 Oct 2012 → 1 Nov 2012

Publication series

Name	ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Conference

Conference	2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012
Country/Territory	China
City	Xi'an
Period	29/10/12 → 1/11/12

Access to Document

10.1109/ICSICT.2012.6467586

Cite this

Wang, J., Du, G., Lun, Z., Wei, K., Zeng, L., & Liu, X. (2012). Performance investigation on the reconfigurable Si nanowire schottky barrier transistors. In ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings Article 6467586 (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). https://doi.org/10.1109/ICSICT.2012.6467586

Wang, Juncheng ; Du, Gang ; Lun, Zhiyuan et al. / Performance investigation on the reconfigurable Si nanowire schottky barrier transistors. ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

@inproceedings{0c97947253744cff82d0ea0227b85fb5,

title = "Performance investigation on the reconfigurable Si nanowire schottky barrier transistors",

abstract = "In this paper, the performance of the reconfigurable Si nanowire schottky barrier transistors (RFETs) is investigated with simulation method. In contrast to conventional Schottky barrier MOSFETs (SB-MOSFETs) and silicon nanowire transistors (Si-NWTs) with metal/silicide as source/drain, the separate two gates in RFETs are located at the two Schottky junctions. Our simulation results show the variable electric characteristics and working principle of the RFETs working as p-/n-type. The RFETs exhibit higher on/off current ratio compared with other Schottky transistors.",

author = "Juncheng Wang and Gang Du and Zhiyuan Lun and Kangliang Wei and Lang Zeng and Xiaoyan Liu",

year = "2012",

doi = "10.1109/ICSICT.2012.6467586",

language = "英语",

isbn = "9781467324724",

series = "ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings",

booktitle = "ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings",

note = "2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012 ; Conference date: 29-10-2012 Through 01-11-2012",

}

Wang, J, Du, G, Lun, Z, Wei, K, Zeng, L & Liu, X 2012, Performance investigation on the reconfigurable Si nanowire schottky barrier transistors. in ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings., 6467586, ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012, Xi'an, China, 29/10/12. https://doi.org/10.1109/ICSICT.2012.6467586

Performance investigation on the reconfigurable Si nanowire schottky barrier transistors. / Wang, Juncheng; Du, Gang; Lun, Zhiyuan et al.
ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. 6467586 (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Performance investigation on the reconfigurable Si nanowire schottky barrier transistors

AU - Wang, Juncheng

AU - Du, Gang

AU - Lun, Zhiyuan

AU - Wei, Kangliang

AU - Zeng, Lang

AU - Liu, Xiaoyan

PY - 2012

Y1 - 2012

N2 - In this paper, the performance of the reconfigurable Si nanowire schottky barrier transistors (RFETs) is investigated with simulation method. In contrast to conventional Schottky barrier MOSFETs (SB-MOSFETs) and silicon nanowire transistors (Si-NWTs) with metal/silicide as source/drain, the separate two gates in RFETs are located at the two Schottky junctions. Our simulation results show the variable electric characteristics and working principle of the RFETs working as p-/n-type. The RFETs exhibit higher on/off current ratio compared with other Schottky transistors.

AB - In this paper, the performance of the reconfigurable Si nanowire schottky barrier transistors (RFETs) is investigated with simulation method. In contrast to conventional Schottky barrier MOSFETs (SB-MOSFETs) and silicon nanowire transistors (Si-NWTs) with metal/silicide as source/drain, the separate two gates in RFETs are located at the two Schottky junctions. Our simulation results show the variable electric characteristics and working principle of the RFETs working as p-/n-type. The RFETs exhibit higher on/off current ratio compared with other Schottky transistors.

UR - https://www.scopus.com/pages/publications/84874821737

U2 - 10.1109/ICSICT.2012.6467586

DO - 10.1109/ICSICT.2012.6467586

M3 - 会议稿件

AN - SCOPUS:84874821737

SN - 9781467324724

T3 - ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

BT - ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

T2 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012

Y2 - 29 October 2012 through 1 November 2012

ER -

Wang J, Du G, Lun Z, Wei K, Zeng L, Liu X. Performance investigation on the reconfigurable Si nanowire schottky barrier transistors. In ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. 6467586. (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). doi: 10.1109/ICSICT.2012.6467586

Performance investigation on the reconfigurable Si nanowire schottky barrier transistors

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