PASO: A PVT-Aware device Sizing framework for OTA circuit with sub-block annotation-based parameter reduction

Device sizing is essential in the design of Operational Transconductance Amplifiers (OTAs), which is a fundamental building block in modern analog and mixed-signal circuits. But its automation remains elusive due to its high-dimensional design space, multiple circuit performance metrics and constraints, as well as the ubiquitous variation of performance under different process, voltage and temperature (PVT) conditions. To address such challenge, we propose PASO, a novel automation method for the device sizing of OTA. To be specific, PASO reduces the overall design space dimension by a graph-based sub-block annotation strategy to exploit circuit symmetry, and optimizes circuit performance via a three-stage Bayesian optimization process that progressively secures feasibility from nominal to worst-case corners, and finally maximizing performance objectives. Experimental results on three distinct cases demonstrate that the proposed method may achieve up to 40% reduction on the number of design variables. Comparing with four state-of-the-art approaches, only 30%−61% SPICE simulations are needed for our method to obtain the first feasible solution. Its final circuit performances are also superior in the high-dimensional case of 199 design variables.