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OpenYield: An Open-Source SRAM Yield Analysis and Optimization Benchmark Suite

  • Shan Shen
  • , Xingyang Li
  • , Zhuohua Liu
  • , Junhao Ma
  • , Yikai Wang
  • , Yiheng Wu
  • , Yuquan Sun
  • , Wei W. Xing*
  • *Corresponding author for this work
  • Nanjing University of Science and Technology
  • Beihang University
  • University of Sheffield

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Static Random-Access Memory (SRAM) yield analysis is essential for semiconductor innovation, yet research progress faces a critical challenge: the large gap between simplified academic models and the complexities observed in practice. The lack of open, higher-fidelity benchmarks has hindered reproducibility and transferability, as promising academic techniques often fail to carry over to more realistic settings. We present OpenYield, an open-source ecosystem that aims to narrow this gap through three contributions: (i) An SRAM circuit generator that explicitly incorporates second-order effects (interconnect/line parasitics, inter-cell leakage coupling, and peripheralcircuit variations) that are commonly omitted in academic studies. (ii) A standardized evaluation platform with a simple interface and baseline yield-analysis implementations to enable fair comparisons and reproducible research on these higherfidelity circuits. (iii) An optimization platform for transistor-level sizing under these models, supporting reproducible studies of robustness/efficiency trade-offs. OpenYield aims to foster more reproducible and transferable progress in SRAM-yield research. The framework is publicly available at OpenYield:URL.

Original languageEnglish
Title of host publicationProceedings - 2025 IEEE 43rd International Conference on Computer Design, ICCD 2025
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages167-175
Number of pages9
ISBN (Electronic)9798331503468
DOIs
StatePublished - 2025
Event43rd International Conference on Computer Design, ICCD 2025 - Richardson, United States
Duration: 10 Nov 2025 → 12 Nov 2025

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
ISSN (Print)1063-6404

Conference

Conference43rd International Conference on Computer Design, ICCD 2025
Country/TerritoryUnited States
CityRichardson
Period10/11/25 → 12/11/25

Keywords

  • compiler
  • size optimization
  • sram
  • yield anlysis

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