Modeling and impedance analysis of power distribution network in 3D ICs with TSVs

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Abstract

This paper focuses on the modeling and analysis of different power distribution network (PDN) structures in 3D TSV ICs, including 3D full wave model and equivalent circuit model. In addition, a simplified equivalent circuit model of stacked PDN is proposed to analysis aspects influencing stacked PDN impedance, such as number of ground TSVs, number of TSV pairs and number of stacked layers. Analyses about how these aspects influencing total capacitance, inductance of stacked PDN and causing resonance in PDN self-impedance (Z11) are made in detail. What's more, power noise in different stacked PDN structures is calculated and analyzed in time domain to evaluate their power integrity features. Analysis in this paper can offer instructions for the design and analysis of on-chip PDN.

Original languageEnglish
Title of host publication2017 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, EMCSI 2017 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages321-326
Number of pages6
ISBN (Electronic)9781538622308
DOIs
StatePublished - 20 Oct 2017
Event2017 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, EMCSI 2017 - Washington, United States
Duration: 7 Aug 201711 Aug 2017

Publication series

NameIEEE International Symposium on Electromagnetic Compatibility
ISSN (Print)1077-4076
ISSN (Electronic)2158-1118

Conference

Conference2017 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, EMCSI 2017
Country/TerritoryUnited States
CityWashington
Period7/08/1711/08/17

Keywords

  • 3D ICs
  • Impedance analysis
  • PDN
  • Power noise analysis

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