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Implementation of Lightweight Block Ciphers CLEFIA and PRINCE on Cortex-M7 Processor

  • Xiaohan Jia
  • , Jiqiang Lu*
  • *Corresponding author for this work
  • Beihang University

Research output: Contribution to journal › Conference article › peer-review

Abstract

The Cortex-M7 processor is widely used in applications requiring high performance and low energy, like Internet of Things, smart devices, and industrial management, owing to its superior computational efficiency and little energy usage. This paper investigates block cipher implementation on Cortex-M7, addressing the resource constraints and real-time demands of embedded systems. Cache strategies enhance memory access efficiency, branch prediction accelerates conditional execution, and barrel shifters speed up shift operations. Ultimately, the DoubleSwap function of the CLEFIA block cipher is optimised by bit manipulation techniques, while the performance of the PRINCE block cipher is enhanced via bit slicing methods. Experimental results show that the encryption rates of the optimised CLEFIA and PRINCE on Cortex-M7 achieve 4401.41 Kbps and 3485.78 Kbps, respectively, which are 4.47 and 2.61 times faster than their respective straightforward implementation.

Original languageEnglish
Pages (from-to)33-39
Number of pages7
JournalProceedings of the IEEE International Conference on Service Operations and Logistics, and Informatics, SOLI
Issue number2025
DOIs
StatePublished - 2025
Event19th IEEE International Conference on Service Operations and Logistics, and Informatics, SOLI 2025 - Singapore, Singapore
Duration: 28 Sep 2025 → 30 Sep 2025

Keywords

  • bit slicing
  • Cortex-M7
  • lightweight block cipher

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