Implementation of high-speed serial interconnects for multi-processor parallel system

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Abstract

Multi-processor parallel system is widely used to meet the increasing demand of high-performance computing. However, the data interacting between processors is often a bottleneck as it is hard for parallel buses to address the requirement of transmitting mass data in high speed. Based on differential signal and embedded clock technology, high-speed serial interconnect has been the ideal solution. In this paper, we designed a multi-processor parallel system and implemented the high-speed serial interconnects between processors based on Serial Rapid IO (SRIO), PCI Express (PCIe), and Hyperlink protocols. The test results are given to show the throughput performance of these interconnects.

Original languageEnglish
Title of host publicationAdvanced Multimedia and Ubiquitous Engineering - Future Information Technology
EditorsNeil Y. Yen, James J. Park, Han-Chieh Chao, Hamid Arabnia
PublisherSpringer Verlag
Pages331-336
Number of pages6
ISBN (Electronic)9783662474860
DOIs
StatePublished - 2015
Event10th International Conference on Future Information Technology, FutureTech 2015 - Hanoi, Viet Nam
Duration: 18 May 201520 May 2015

Publication series

NameLecture Notes in Electrical Engineering
Volume352
ISSN (Print)1876-1100
ISSN (Electronic)1876-1119

Conference

Conference10th International Conference on Future Information Technology, FutureTech 2015
Country/TerritoryViet Nam
CityHanoi
Period18/05/1520/05/15

Keywords

  • Hyperlink
  • Multi-Processor parallel system
  • PCIe
  • SRIO

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