High-throughput Improved SCL-Flip Polar Code Decoder Architecture

SCL-Flip (SCLF) is a novel low-complexity polar code decoding algorithm that combines Successive Cancellation List (SCL) decoding with flip-based techniques, offering a trade-off between error rate performance, area efficiency, and energy consumption. This paper introduces an innovative flip-based architecture for a highly area-efficient SCL decoder. We simplify the transcendental computations in SCLF decoding through approximation and incorporate an efficient early termination technique to reduce redundant flip operations. The proposed hardware architecture for the SCLF decoder features an early stopping strategy and an efficient metric sorter. Our simplifications and approximations have minimal impact on error correction performance. The proposed design reduces the computational complexity of SCLF decoding across a wide range of signal-to-noise ratios (SNRs), demonstrating its potential for practical applications in communication systems. We validate the effectiveness of the architecture through implementation on an FPGA platform. Compared to state-of-the-art fast SCL8 decoders with equivalent Block Error Rate (BLER) performance, our proposed decoders achieve up to 7.57 times greater throughput per LUT. This improvement in area efficiency also translates to enhanced energy efficiency, making the proposed SCLF decoder a promising solution for modern communication systems requiring high performance and resource efficiency.