High-robustness and high-density VCMA-MRAM with energy-efficient BL-write scheme

Edge computing and always-on intelligent systems impose growing demands for high-density and low-power embedded memories. Voltage-controlled magnetic anisotropy magnetic random-access memory (VCMA-MRAM) is a promising candidate due to its sub-nanosecond and energy-efficient write operation. Conventional VCMA-MRAM adopts a source-line (SL)-write scheme to suppress unselected bit-cell write disturbance, but it requires a boosted word-line (WL) voltage to ensure sufficient write margin. To address this issue, this paper proposes a bit-line (BL)-write VCMA-MRAM architecture that eliminates the need for WL voltage boosting and uses a BL standby biasing scheme to suppress write disturbance. Specifically, the BL standby bias is set to half of the write voltage, which reduces the peak parasitic pulse across unselected magnetic tunnel junctions (MTJs). Under the evaluated conditions, this voltage level does not induce unintended switching, enabling reliable BL writing while reducing the WL voltage by 33.33% compared with the conventional SL-write scheme. Furthermore, the optimized BL-write architecture reduces the bit-cell area by 41.67% owing to the simplified interconnection between MTJs and transistors and the grounded-SL layout. Additionally, the optimized BL-write architecture, together with the proposed BL standby biasing scheme, reduces the write and read energies by 61.27% and 61.00%, respectively. The proposed VCMA-MRAM design also supports reconfigurable physically unclonable function (PUF) operation through long-pulse stochastic switching without additional dedicated PUF cells, reducing the reconfiguration energy by 80.65%.