Finite element analysis of electromigration induced stress in through-silicon-via

Through-silicon-via (TSV) plays a key role in chip's vertical interconnection in 3D electronic package, so its reliability shows great importance. As the current density through TSV increasing, current induced stress has larger and larger influence on the TSV's reliability. The methodology for evaluation of electromigration induced stress in TSV was developed based on the coupling equation of stress-mass diffusion and the principle of finite element method (FEM), together with the user defined element on the platform of ABAQUS. The numerical simulation of this model was set and its accuracy was verified with analytical solution. The electromigration problem was simulated with a finite element model; The evolution and distribution of electromigration induced stress, strain and vacancy concentration in copper pour hatch were described. So the reliability of 3D electronic package could be assessed someway.