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Enhancing CubeSat reliability and efficiency: an approach to hot redundancy with heterogeneous hardware-software architecture

  • Yinghao Xiang
  • , Zebei Zhao
  • , Ziyu Zhou
  • , Pei Chen*
  • *Corresponding author for this work
  • Beihang University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This CubeSat integrated electronic systems based on Commercial Off-The-Shelf (COTS) components face reliability challenges. Current research on enhancing system reliability primarily focuses on multi-hardware homogeneous hot redundancy and multi-system cold redundancy. However, the hot redundancy of multiple homogeneous high-performance processors is challenging for CubeSats due to their limited energy sources and the high-power requirements. Multi-system cold redundancy experiences long activation times during problems, failing to maintain stable program operation, which adversely affects the real-time performance of the system. Therefore, this paper proposes a CubeSat tight system solution that incorporates heterogeneous hardware and heterogeneous software with multi-processor hot redundancy, characterized by high real-time performance, high reliability and high energy efficiency. Through a scheduling system and its peripheral hardware, this solution achieves mutual hot redundancy among multiple hardware components, allowing the continuous operation of the main program while simultaneously performing hardware reboot and error correction on any processor encountering errors. Secondly, high-performance processor can handle real-time image processing tasks and simultaneously carry out satellite telemetry and telecontrol (TT&C) tasks, whereas low-power processors are dedicated solely to satellite TT&C tasks. An FPGA achieves the time synchronization targets of heterogeneous processors and implements a two-out-of-three arbitration mechanism for TT&C instruction processing, thus ensuring the accuracy of these instructions while monitoring the operational status of the processors. Due to the performance differences between processors, the high-performance processor employs the ROS2 system running on Linux to harness the parallel processing capabilities of a multi-core processor more effectively, while low-power processors utilize FreeRTOS to meet the real-time requirements of satellite tasks. This solution is set to be applied to a 3U CubeSat scheduled for launch in late 2024.

Original languageEnglish
Title of host publicationIAF Space Systems Symposium - Held at the 75th International Astronautical Congress, IAC 2024
PublisherInternational Astronautical Federation, IAF
Pages666-671
Number of pages6
ISBN (Electronic)9798331312060, 9798331312084, 9798331312114, 9798331312138, 9798331312145, 9798331312169, 9798331312190, 9798331312206, 9798331312220, 9798331312237, 9798331312244, 9798331312299
DOIs
StatePublished - 2024
Event31st IAA Symposium on Small Satellite Missions at the 75th International Astronautical Congress, IAC 2024 - Milan, Italy
Duration: 14 Oct 202418 Oct 2024

Publication series

NameProceedings of the International Astronautical Congress, IAC
Volume2-B
ISSN (Print)0074-1795

Conference

Conference31st IAA Symposium on Small Satellite Missions at the 75th International Astronautical Congress, IAC 2024
Country/TerritoryItaly
CityMilan
Period14/10/2418/10/24

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 7 - Affordable and Clean Energy
    SDG 7 Affordable and Clean Energy

Keywords

  • COTS
  • CubeSat
  • Flight system
  • Redundancy

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