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Enabling highly efficient capsule networks processing through a PIM-based architecture design

  • Xingyao Zhang
  • , Shuaiwen Leon Song
  • , Chenhao Xie
  • , Jing Wang
  • , Weigong Zhang
  • , Xin Fu
  • University of Houston
  • The University of Sydney
  • Pacific Northwest National Laboratory
  • Capital Normal University
  • Beijing Advanced Innovation Center for Imaging Theory and Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In recent years, the CNNs have achieved great successes in the image processing tasks, e.g., image recognition and object detection. Unfortunately, traditional CNN's classification is found to be easily misled by increasingly complex image features due to the usage of pooling operations, hence unable to preserve accurate position and pose information of the objects. To address this challenge, a novel neural network structure called Capsule Network has been proposed, which introduces equivariance through capsules to significantly enhance the learning ability for image segmentation and object detection. Due to its requirement of performing a high volume of matrix operations, CapsNets have been generally accelerated on modern GPU platforms that provide highly optimized software library for common deep learning tasks. However, based on our performance characterization on modern GPUs, CapsNets exhibit low efficiency due to the special program and execution features of their routing procedure, including massive unshareable intermediate variables and intensive synchronizations, which are very difficult to optimize at software level. To address these challenges, we propose a hybrid computing architecture design named PIM-CapsNet. It preserves GPU's on-chip computing capability for accelerating CNN types of layers in CapsNet, while pipelining with an off-chip in-memory acceleration solution that effectively tackles routing procedure's inefficiency by leveraging the processing-in-memory capability of today's 3D stacked memory. Using routing procedure's inherent parallellization feature, our design enables hierarchical improvements on CapsNet inference efficiency through minimizing data movement and maximizing parallel processing in memory. Evaluation results demonstrate that our proposed design can achieve substantial improvement on both performance and energy savings for CapsNet inference, with almost zero accuracy loss. The results also suggest good performance scalability in optimizing the routing procedure with increasing network size.

Original languageEnglish
Title of host publicationProceedings - 2020 IEEE International Symposium on High Performance Computer Architecture, HPCA 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages542-555
Number of pages14
ISBN (Electronic)9781728161495
DOIs
StatePublished - Feb 2020
Externally publishedYes
Event26th IEEE International Symposium on High Performance Computer Architecture, HPCA 2020 - San Diego, United States
Duration: 22 Feb 202026 Feb 2020

Publication series

NameProceedings - 2020 IEEE International Symposium on High Performance Computer Architecture, HPCA 2020

Conference

Conference26th IEEE International Symposium on High Performance Computer Architecture, HPCA 2020
Country/TerritoryUnited States
CitySan Diego
Period22/02/2026/02/20

Keywords

  • Architectural Application of Machine Learning
  • Domain Specific Accelertors
  • Emerging Technologies

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