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Electrical and interfacial characteristics of nanolaminate (Al2O3/ZrO2/Al2O3) gate stack on fully depleted SiGe-on-insulator

  • Zengfeng Di
  • , Miao Zhang
  • , Weili Liu
  • , Qinwo Shen
  • , Zhitang Song
  • , Chenglu Lin
  • , Anping Huang
  • , Paul K. Chu*
  • *Corresponding author for this work
  • CAS - Shanghai Institute of Microsystem and Information Technology
  • City University of Hong Kong

Research output: Contribution to journalArticlepeer-review

Abstract

The structural and electrical characteristics of a novel nanolaminate Al2O3/ZrO2/Al2O3 high-k gate stack together with the interfacial layer (IL) formed on SiGe-on-insulator (SGOI) substrate have been investigated. A clear layered Al2O3 (2.5 nm)/ZrO2 (4.5 nm)/Al2O3 (2.5 nm) structure and an IL (2.5 nm) are observed by high-resolution transmission electron microscopy. X-ray photoelectron spectroscopy measurements indicate that the IL contains Al-silicate without Ge atom incorporation. A well-behaved C-V behavior with no hysteresis shows the absence of Ge pileup or Ge segregation at the gate stack/SiGe interface.

Original languageEnglish
Pages (from-to)959-963
Number of pages5
JournalMaterials Science in Semiconductor Processing
Volume9
Issue number6
DOIs
StatePublished - Dec 2006
Externally publishedYes

Keywords

  • Capacitance-voltage
  • High-k gate stack
  • Oxidation
  • SiGe-on-insulator

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