Efficient multi-prime RSA immune against hardware fault attack

Y. Yang; Z. Abid; W. Wang; Z. Zhang; C. Yang

doi:10.1109/ISCAS.2005.1465669

Efficient multi-prime RSA immune against hardware fault attack

Y. Yang^*
, Z. Abid
, W. Wang
, Z. Zhang
, C. Yang

^*Corresponding author for this work

School of Aeronautic Science and Engineering

Western University
Beihang University

Research output: Contribution to journal › Conference article › peer-review

3 Scopus citations

Abstract

In this paper, a study on the factorization analysis and improvement of the Chinese remainder theorem (CRT) -based multi-prime RSA against the hardware fault attack is carried out. Novel immune CRTbased multi-prime RSA is proposed and its properties in terms of the factorization complexity and operation speed are compared with those of extended CRT-2 protocol [7]. The proposed multi-prime RSA and the extended CRT-2 protocol applied in a three-prime RSA are implemented using FPGA technology. The implementation results show that the proposed immune multi-prime RSA is 30% faster while requiring only 75% of the hardware resources, compared to the extended CRT-2 RSA protocol.

Original language	English
Article number	1465669
Pages (from-to)	4649-4652
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
DOIs	https://doi.org/10.1109/ISCAS.2005.1465669
State	Published - 2005
Event	IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan Duration: 23 May 2005 → 26 May 2005

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@article{e25450b9373a4f7dad8582c1d44b03ae,

title = "Efficient multi-prime RSA immune against hardware fault attack",

abstract = "In this paper, a study on the factorization analysis and improvement of the Chinese remainder theorem (CRT) -based multi-prime RSA against the hardware fault attack is carried out. Novel immune CRTbased multi-prime RSA is proposed and its properties in terms of the factorization complexity and operation speed are compared with those of extended CRT-2 protocol [7]. The proposed multi-prime RSA and the extended CRT-2 protocol applied in a three-prime RSA are implemented using FPGA technology. The implementation results show that the proposed immune multi-prime RSA is 30\% faster while requiring only 75\% of the hardware resources, compared to the extended CRT-2 RSA protocol.",

author = "Y. Yang and Z. Abid and W. Wang and Z. Zhang and C. Yang",

year = "2005",

doi = "10.1109/ISCAS.2005.1465669",

language = "英语",

pages = "4649--4652",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 ; Conference date: 23-05-2005 Through 26-05-2005",

}

TY - JOUR

T1 - Efficient multi-prime RSA immune against hardware fault attack

AU - Yang, Y.

AU - Abid, Z.

AU - Wang, W.

AU - Zhang, Z.

AU - Yang, C.

PY - 2005

Y1 - 2005

N2 - In this paper, a study on the factorization analysis and improvement of the Chinese remainder theorem (CRT) -based multi-prime RSA against the hardware fault attack is carried out. Novel immune CRTbased multi-prime RSA is proposed and its properties in terms of the factorization complexity and operation speed are compared with those of extended CRT-2 protocol [7]. The proposed multi-prime RSA and the extended CRT-2 protocol applied in a three-prime RSA are implemented using FPGA technology. The implementation results show that the proposed immune multi-prime RSA is 30% faster while requiring only 75% of the hardware resources, compared to the extended CRT-2 RSA protocol.

AB - In this paper, a study on the factorization analysis and improvement of the Chinese remainder theorem (CRT) -based multi-prime RSA against the hardware fault attack is carried out. Novel immune CRTbased multi-prime RSA is proposed and its properties in terms of the factorization complexity and operation speed are compared with those of extended CRT-2 protocol [7]. The proposed multi-prime RSA and the extended CRT-2 protocol applied in a three-prime RSA are implemented using FPGA technology. The implementation results show that the proposed immune multi-prime RSA is 30% faster while requiring only 75% of the hardware resources, compared to the extended CRT-2 RSA protocol.

UR - https://www.scopus.com/pages/publications/55349087407

U2 - 10.1109/ISCAS.2005.1465669

DO - 10.1109/ISCAS.2005.1465669

M3 - 会议文章

AN - SCOPUS:55349087407

SN - 0271-4310

SP - 4649

EP - 4652

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

M1 - 1465669

T2 - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005

Y2 - 23 May 2005 through 26 May 2005

ER -

Efficient multi-prime RSA immune against hardware fault attack

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