Dynamic programming-based lifetime reliability optimization in networks-on-chip

Liang Wang; Xiaohang Wang; Terrence Mak

doi:10.1007/978-3-319-25279-7_1

Dynamic programming-based lifetime reliability optimization in networks-on-chip

Liang Wang^*
, Xiaohang Wang
, Terrence Mak

^*Corresponding author for this work

Chinese University of Hong Kong
Chinese Academy of Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

Technology scaling leads to the reliability issue as a primary concern in Networks-on-Chip (NoC) design. Due to routing algorithms, some routers may age much faster than others, which become a bottleneck for system lifetime. In this chapter, lifetime is modeled as a resource consumed over time. A metric lifetime budget is associated with each router, indicating the maximum allowed workload for current period. Since the heterogeneity in router lifetime reliability has strong correlation with the routing algorithm, we define a problem to optimize the lifetime by routing packets along the path with maximum lifetime budgets. A dynamic programming-based lifetime-aware routing algorithm is proposed to optimize the lifetime distribution of routers. The dynamic programming network approach is employed to solve this problem with linear complexity. The experimental results show that the lifetime-aware routing has around 20%, 45%, 55% minimal MTTF improvement than XY routing, NoP routing, and Oddeven routing, respectively.

Original language	English
Title of host publication	VLSI-SoC
Subtitle of host publication	Internet of Things Foundations - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Revised and Extended Selected Papers
Editors	Maria-Teresa Sanz-Pascual, Arturo Sarmiento-Reyes, Luc Claesen, Ricardo Reis
Publisher	Springer New York LLC
Pages	1-20
Number of pages	20
ISBN (Print)	9783319252780
DOIs	https://doi.org/10.1007/978-3-319-25279-7_1
State	Published - 2015
Externally published	Yes
Event	22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014 - Playa del Carmen, Mexico Duration: 6 Oct 2014 → 8 Oct 2014

Publication series

Name	IFIP Advances in Information and Communication Technology
Volume	464
ISSN (Print)	1868-4238

Conference

Conference	22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014
Country/Territory	Mexico
City	Playa del Carmen
Period	6/10/14 → 8/10/14

Keywords

Dynamic programming
Networks-on-Chip
Reliability
Routing algorithm

Access to Document

10.1007/978-3-319-25279-7_1

Cite this

Wang, L., Wang, X., & Mak, T. (2015). Dynamic programming-based lifetime reliability optimization in networks-on-chip. In M.-T. Sanz-Pascual, A. Sarmiento-Reyes, L. Claesen, & R. Reis (Eds.), VLSI-SoC: Internet of Things Foundations - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Revised and Extended Selected Papers (pp. 1-20). (IFIP Advances in Information and Communication Technology; Vol. 464). Springer New York LLC. https://doi.org/10.1007/978-3-319-25279-7_1

Wang, Liang ; Wang, Xiaohang ; Mak, Terrence. / Dynamic programming-based lifetime reliability optimization in networks-on-chip. VLSI-SoC: Internet of Things Foundations - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Revised and Extended Selected Papers. editor / Maria-Teresa Sanz-Pascual ; Arturo Sarmiento-Reyes ; Luc Claesen ; Ricardo Reis. Springer New York LLC, 2015. pp. 1-20 (IFIP Advances in Information and Communication Technology).

@inproceedings{58fcba8d319a4031bebb05580719374c,

title = "Dynamic programming-based lifetime reliability optimization in networks-on-chip",

abstract = "Technology scaling leads to the reliability issue as a primary concern in Networks-on-Chip (NoC) design. Due to routing algorithms, some routers may age much faster than others, which become a bottleneck for system lifetime. In this chapter, lifetime is modeled as a resource consumed over time. A metric lifetime budget is associated with each router, indicating the maximum allowed workload for current period. Since the heterogeneity in router lifetime reliability has strong correlation with the routing algorithm, we define a problem to optimize the lifetime by routing packets along the path with maximum lifetime budgets. A dynamic programming-based lifetime-aware routing algorithm is proposed to optimize the lifetime distribution of routers. The dynamic programming network approach is employed to solve this problem with linear complexity. The experimental results show that the lifetime-aware routing has around 20\%, 45\%, 55\% minimal MTTF improvement than XY routing, NoP routing, and Oddeven routing, respectively.",

keywords = "Dynamic programming, Networks-on-Chip, Reliability, Routing algorithm",

author = "Liang Wang and Xiaohang Wang and Terrence Mak",

note = "Publisher Copyright: {\textcopyright} IFIP International Federation for Information Processing 2015.; 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014 ; Conference date: 06-10-2014 Through 08-10-2014",

year = "2015",

doi = "10.1007/978-3-319-25279-7\_1",

language = "英语",

isbn = "9783319252780",

series = "IFIP Advances in Information and Communication Technology",

publisher = "Springer New York LLC",

pages = "1--20",

editor = "Maria-Teresa Sanz-Pascual and Arturo Sarmiento-Reyes and Luc Claesen and Ricardo Reis",

booktitle = "VLSI-SoC",

}

Wang, L, Wang, X & Mak, T 2015, Dynamic programming-based lifetime reliability optimization in networks-on-chip. in M-T Sanz-Pascual, A Sarmiento-Reyes, L Claesen & R Reis (eds), VLSI-SoC: Internet of Things Foundations - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology, vol. 464, Springer New York LLC, pp. 1-20, 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Playa del Carmen, Mexico, 6/10/14. https://doi.org/10.1007/978-3-319-25279-7_1

Dynamic programming-based lifetime reliability optimization in networks-on-chip. / Wang, Liang; Wang, Xiaohang; Mak, Terrence.
VLSI-SoC: Internet of Things Foundations - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Revised and Extended Selected Papers. ed. / Maria-Teresa Sanz-Pascual; Arturo Sarmiento-Reyes; Luc Claesen; Ricardo Reis. Springer New York LLC, 2015. p. 1-20 (IFIP Advances in Information and Communication Technology; Vol. 464).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Dynamic programming-based lifetime reliability optimization in networks-on-chip

AU - Wang, Liang

AU - Wang, Xiaohang

AU - Mak, Terrence

N1 - Publisher Copyright: © IFIP International Federation for Information Processing 2015.

PY - 2015

Y1 - 2015

N2 - Technology scaling leads to the reliability issue as a primary concern in Networks-on-Chip (NoC) design. Due to routing algorithms, some routers may age much faster than others, which become a bottleneck for system lifetime. In this chapter, lifetime is modeled as a resource consumed over time. A metric lifetime budget is associated with each router, indicating the maximum allowed workload for current period. Since the heterogeneity in router lifetime reliability has strong correlation with the routing algorithm, we define a problem to optimize the lifetime by routing packets along the path with maximum lifetime budgets. A dynamic programming-based lifetime-aware routing algorithm is proposed to optimize the lifetime distribution of routers. The dynamic programming network approach is employed to solve this problem with linear complexity. The experimental results show that the lifetime-aware routing has around 20%, 45%, 55% minimal MTTF improvement than XY routing, NoP routing, and Oddeven routing, respectively.

AB - Technology scaling leads to the reliability issue as a primary concern in Networks-on-Chip (NoC) design. Due to routing algorithms, some routers may age much faster than others, which become a bottleneck for system lifetime. In this chapter, lifetime is modeled as a resource consumed over time. A metric lifetime budget is associated with each router, indicating the maximum allowed workload for current period. Since the heterogeneity in router lifetime reliability has strong correlation with the routing algorithm, we define a problem to optimize the lifetime by routing packets along the path with maximum lifetime budgets. A dynamic programming-based lifetime-aware routing algorithm is proposed to optimize the lifetime distribution of routers. The dynamic programming network approach is employed to solve this problem with linear complexity. The experimental results show that the lifetime-aware routing has around 20%, 45%, 55% minimal MTTF improvement than XY routing, NoP routing, and Oddeven routing, respectively.

KW - Dynamic programming

KW - Networks-on-Chip

KW - Reliability

KW - Routing algorithm

UR - https://www.scopus.com/pages/publications/84945962686

U2 - 10.1007/978-3-319-25279-7_1

DO - 10.1007/978-3-319-25279-7_1

M3 - 会议稿件

AN - SCOPUS:84945962686

SN - 9783319252780

T3 - IFIP Advances in Information and Communication Technology

SP - 1

EP - 20

BT - VLSI-SoC

A2 - Sanz-Pascual, Maria-Teresa

A2 - Sarmiento-Reyes, Arturo

A2 - Claesen, Luc

A2 - Reis, Ricardo

PB - Springer New York LLC

T2 - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014

Y2 - 6 October 2014 through 8 October 2014

ER -

Wang L, Wang X, Mak T. Dynamic programming-based lifetime reliability optimization in networks-on-chip. In Sanz-Pascual MT, Sarmiento-Reyes A, Claesen L, Reis R, editors, VLSI-SoC: Internet of Things Foundations - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Revised and Extended Selected Papers. Springer New York LLC. 2015. p. 1-20. (IFIP Advances in Information and Communication Technology). doi: 10.1007/978-3-319-25279-7_1

Dynamic programming-based lifetime reliability optimization in networks-on-chip

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this