Design of RF digital receiver based on FPGA

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

According to SDR (software defined radio) theories, digitization of signal processing should approach front-end as much as possible. On the basis of the RF signal features, this paper achieved a digital receiver by RF bandpass sampling directly. A parallel digital down conversion based on polyphase filtering and a multi-channel parallel correlation structure were designed. Digital receiver adopted FIFO as interfaces and DDS mode as analog output. Hardware debugging result showed the feasibility of the digital receiver implementation. Under the situation of hardware structure changelessness, this receiver could be used in other fields by modifying the hardware program with a wide application prospect.

Original languageEnglish
Title of host publicationIET International Communication Conference on Wireless Mobile and Computing, CCWMC 2009
Pages699-702
Number of pages4
Edition562 CP
DOIs
StatePublished - 2009
EventIET International Communication Conference on Wireless Mobile and Computing, CCWMC 2009 - Shanghai, China
Duration: 7 Dec 20099 Dec 2009

Publication series

NameIET Conference Publications
Number562 CP
Volume2009

Conference

ConferenceIET International Communication Conference on Wireless Mobile and Computing, CCWMC 2009
Country/TerritoryChina
CityShanghai
Period7/12/099/12/09

Keywords

  • Multi-channel parallel correlation
  • Parallel DDC
  • Polyphase filtering
  • RF receiver
  • Software defined radio

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