@inproceedings{82ac15afdad34b72bcad3d00a3bf7ed0,
title = "Design of FPGA high-speed paralleling M sequence",
abstract = "To resolve the problem of processing clock frequency far below data generation rate for generating high-speed m sequence in FPGA, this paper adopts three methods of delay method, equivalent method and substitution method to design the parallel structure for generating paralleling m sequence and implements it on FPGA.The test results show that the generated paralleling m sequences fully meet the standard format requirements. This parallel structure achieves better application effects in the tests of scrambling and descrambling, BER, and coding and decoding in high-speed communication system.",
keywords = "High-speed communication, PN sequence, Parallel structure",
author = "Hao, \{Zhi Song\} and Zheng, \{Zhi Ming\} and Song, \{Rui Liang\}",
note = "Publisher Copyright: {\textcopyright} Springer Nature Singapore Pte Ltd. 2019.; 6th International Conference on Communications, Signal Processing, and Systems, CSPS 2017 ; Conference date: 14-07-2017 Through 16-07-2017",
year = "2019",
doi = "10.1007/978-981-10-6571-2\_225",
language = "英语",
isbn = "9789811065705",
series = "Lecture Notes in Electrical Engineering",
publisher = "Springer Verlag",
pages = "1856--1861",
editor = "Qilian Liang and Min Jia and Jiasong Mu and Wei Wang and Xuhong Feng and Baoju Zhang",
booktitle = "Communications, Signal Processing, and Systems - Proceedings of the 2017 International Conference on Communications, Signal Processing, and Systems",
address = "德国",
}