Design and Optimization of a Parallel Visualization System for Large-scale Dynamic Graphs Based on MT-3000 Processor

Modern battlefield situation visualization faces significant challenges in real-time processing of large-scale dynamic graph data. This paper proposes a parallel visualization architecture based on the MT-3000 digital signal processor, enabling dynamic topology updates and real-time visualization for ten-thousand-level combat units through customized hardware-software co-design. Key innovations include: a Block-SoA memory layout strategy integrated with DMA engine and double buffering to enhance access efficiency of high-dimensional battlefield data; a vectorized computing model oriented to SIMD instruction streams that maps unit state updates into parallel data flows, achieving computational throughput 50.23 times that of CPU solutions; and a dynamic importance assessment with adaptive culling framework that maintains rendering frame rates at 60 FPS for complex battlefield scenarios. Experimental results demonstrate that the system significantly improves computational efficiency and interactive responsiveness of dynamic graph visualization while preserving the accuracy of battlefield topology evolution.