Design and modeling of a neuro-inspired learning circuit using nanotube-based memory devices

  • Si Yu Liao*
  • , Jean Marie Retrouvey
  • , Guillaume Agnus
  • , Weisheng Zhao
  • , Cristell Maneux
  • , S. Frégonése
  • , Thomas Zimmer
  • , Djaafar Chabi
  • , Arianna Filoramo
  • , Vincent Derycke
  • , Christian Gamrat
  • , Jacques Olivier Klein
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

We present an original method to implement neuro-inspired supervised learning for a synaptic array based on carbon nanotube devices. The device characteristics required to implement on chip learning within a crossbar of carbon nanotube field effect transistors (CNTFETs) as synaptic arrays were experimentally demonstrated and accurately modeled through a specific electrical compact model. We performed electrical simulations of learning for an array of 24 nanotube memory devices corresponding to a 3 input × 3 output neural layer that revealed successful learning of separable logic functions within very few epochs, even when a realistic variability of nanotube diameter was taken into account. Such a learning approach opens the way to the use of high-density synaptic arrays as generic logic blocks in configurable circuits.

Original languageEnglish
Article number5728882
Pages (from-to)2172-2181
Number of pages10
JournalIEEE Transactions on Circuits and Systems
Volume58
Issue number9
DOIs
StatePublished - 2011
Externally publishedYes

Keywords

  • Carbon nanotube transistors
  • compact model
  • neural network
  • on-chip learning

Fingerprint

Dive into the research topics of 'Design and modeling of a neuro-inspired learning circuit using nanotube-based memory devices'. Together they form a unique fingerprint.

Cite this