Abstract
We present an original method to implement neuro-inspired supervised learning for a synaptic array based on carbon nanotube devices. The device characteristics required to implement on chip learning within a crossbar of carbon nanotube field effect transistors (CNTFETs) as synaptic arrays were experimentally demonstrated and accurately modeled through a specific electrical compact model. We performed electrical simulations of learning for an array of 24 nanotube memory devices corresponding to a 3 input × 3 output neural layer that revealed successful learning of separable logic functions within very few epochs, even when a realistic variability of nanotube diameter was taken into account. Such a learning approach opens the way to the use of high-density synaptic arrays as generic logic blocks in configurable circuits.
| Original language | English |
|---|---|
| Article number | 5728882 |
| Pages (from-to) | 2172-2181 |
| Number of pages | 10 |
| Journal | IEEE Transactions on Circuits and Systems |
| Volume | 58 |
| Issue number | 9 |
| DOIs | |
| State | Published - 2011 |
| Externally published | Yes |
Keywords
- Carbon nanotube transistors
- compact model
- neural network
- on-chip learning
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