Continuous Bayesian Machine Learning for High-Dimensional Analog and Mixed-Signal Circuit Yield Analysis and Optimization

Traditional yield analysis for analog and mixedsignal (AMS) circuits relies heavily on Monte Carlo (MC) methods, which suffer from a fundamental information inefficiency: they reduce rich, continuous circuit performance metrics to binary pass/fail indicators. As process variations scale into high-dimensional spaces with advanced technology nodes, this inefficiency creates an insurmountable computational barrier. This paper proposes a Continuous Bayesian Inference framework that fundamentally transforms circuit yield analysis from discrete counting to probabilistic integration over the performance landscape. We introduce a Sparse Gaussian Process (SGP) model augmented with Deep Kernel Learning (DKL) to effectively capture the non-stationary correlations in high-dimensional variation spaces, reducing the computational complexity from O(n3) to O(nm2). Furthermore, we propose an information-theoretic active learning strategy based on convolutional entropy, which exploits the smoothness of circuit performance to optimally select samples that maximize uncertainty reduction. Experimental validation on benchmark circuits, including a 569-dimensional SRAM column, demonstrates that the proposed framework achieves a 34.30×-320.14× end-to-end speedup over standard MC. Furthermore, compared to state-of-the-art yield analysis baselines, it demonstrates 1.0×-5.24× end-to-end speedup. Additionally, SBYA can be seamlessly extended to yield optimization tasks, delivering comparable or even superior optimization efficacy while consuming merely one-quarter of the simulation budget required by existing methodologies.