@inproceedings{a5c281da3184481e9e0170938ee94c89,
title = "CaMDN: Enhancing Cache Efficiency for Multi-tenant DNNs on Integrated NPUs",
abstract = "With the rapid development of DNN applications, multi-tenant execution, where multiple DNNs are co-located on a single SoC, is becoming a prevailing trend. Although many methods are proposed in prior works to improve multi-tenant performance, the impact of shared cache is not well studied. This paper proposes CaMDN, an architecture-scheduling co-design to enhance cache efficiency for multi-tenant DNNs on integrated NPUs. Specifically, a lightweight architecture is proposed to support model-exclusive, NPU-controlled regions inside shared cache to eliminate unexpected cache contention. Moreover, a cache scheduling method is proposed to improve shared cache utilization. In particular, it includes a cache-aware mapping method for adaptability to the varying available cache capacity and a dynamic allocation algorithm to adjust the usage among co-located DNNs at runtime. Compared to prior works, CaMDN reduces the memory access by 33.4\% on average and achieves a model speedup of up to 2.56 × (1.88 × on average).",
keywords = "Cache, DNN, Multi-tenant, NPU, SoC",
author = "Tianhao Cai and Liang Wang and Limin Xiao and Meng Han and Zeyu Wang and Lin Sun and Xiaojian Liao",
note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 62nd ACM/IEEE Design Automation Conference, DAC 2025 ; Conference date: 22-06-2025 Through 25-06-2025",
year = "2025",
doi = "10.1109/DAC63849.2025.11132424",
language = "英语",
series = "Proceedings - Design Automation Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2025 62nd ACM/IEEE Design Automation Conference, DAC 2025",
address = "美国",
}