@inproceedings{e284d6bcace644b29af379c9505cfb31,
title = "Behavioral Modeling of A High-Resolution Sigma-Delta Analog-to-Digital Converter",
abstract = "A 24-bit high-resolution sigma-delta analog-to-digital converter (ADC) with 4th-order, 3-bit quantization, and cascaded integrators feed-forward (CIFF) topology is presented in this paper. The ADC is simulated in Simulink with non-ideal factors such as clock jitter, thermal noise, op-amp noise, and non-ideal integrators are analyzed and modeled. The simulation shows that the signal-to-noise ratio (SNR) of the non-ideal model is 136.6 dB and the effective number of bits (ENOB) is 22.73 bits. The sigma-delta ADC satisfies the requirements of high-precision conversion in a variety of industrial measurement scenarios (such as detection and navigation, biosensing, etc.) and medical treatment.",
keywords = "ADC, high-resolution, modulator, noise shaping, oversampling",
author = "Peng Huang and Xichen Duan and Jie Liang and Liuyang Zhang",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 3rd International Conference on Electronic Information Engineering and Computer Science, EIECS 2023 ; Conference date: 22-09-2023 Through 24-09-2023",
year = "2023",
doi = "10.1109/EIECS59936.2023.10435402",
language = "英语",
series = "2023 3rd International Conference on Electronic Information Engineering and Computer Science, EIECS 2023",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "903--906",
booktitle = "2023 3rd International Conference on Electronic Information Engineering and Computer Science, EIECS 2023",
address = "美国",
}