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ATA-Cache: Contention Mitigation for GPU Shared L1 Cache With Aggregated Tag Array

  • Xiangrong Xu
  • , Liang Wang*
  • , Limin Xiao*
  • , Lei Liu
  • , Yuanqiu Lv
  • , Xilong Xie
  • , Meng Han
  • , Hao Liu
  • *Corresponding author for this work
  • Beihang University

Research output: Contribution to journalArticlepeer-review

Abstract

To fully exploit the locality of GPU applications, the GPU shared L1 cache architecture, which shares L1 cache among multiple GPU cores, is a promising architecture while still suffering from high-resource contentions. We present a GPU shared L1 cache architecture with an aggregated tag array that minimizes the L1 cache contentions and takes full advantage of inter-core locality. The key idea is to decouple and aggregate the tag arrays of multiple L1 caches so that the cache requests can be compared with all tag arrays in parallel to probe the replicated data in other caches. The GPU caches are only accessed by other GPU cores when replicated data exists, filtering out unnecessary cache accesses that cause high-resource contentions. We also develop a two-level thread-block scheduling policy adapted for the shared L1 cache architecture to maximize the available locality. The experimental results show that GPU performance can be improved by 14.5% on average for applications with a high inter-core locality.

Original languageEnglish
Pages (from-to)1429-1441
Number of pages13
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume43
Issue number5
DOIs
StatePublished - 1 May 2024

Keywords

  • Contention
  • GPU
  • shared L1 cache
  • tag array

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