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ARM-embedded implementation of a video chaotic secure communication via WAN remote transmission with desirable security and frame rate

  • Ping Chen
  • , Simin Yu*
  • , Xiaoyang Zhang
  • , Jianbin He
  • , Zhuosheng Lin
  • , Chengqing Li
  • , Jinhu Lü
  • *Corresponding author for this work
  • Guangdong University of Technology
  • XiangTan University
  • Chinese Academy of Sciences

Research output: Contribution to journalArticlepeer-review

Abstract

Existing H.264 codec-based video chaotic encryption schemes can be attributed to two classes: the original video data are encrypted with chaos before H.264 encoding; it is encrypted with chaos during H.264 encoding. The main disadvantage of the two classes of schemes is that the contradictory issue between desirable security and fast frame rate is not solved well. To cope with the problem, this paper presents a novel H.264 codec-based video chaotic encryption scheme, where the original video data are encrypted by a stream cipher and position scrambling with chaos after H.264 encoding. In particular, hardware H.264 encoding, multi-core multi-threading process, H.264 data format protection, and adaptive memory selection strategy are adopted to make the proposed scheme implemented successfully. Moreover, security of the chaotic stream cipher is enhanced by introducing a nonlinear nominal matrix. ARM-embedded hardware implementation results via WAN remote transmission demonstrated that the proposed scheme can provide a practical solution for H.264 codec-based video secure communications owning desirable security and fast frame rate.

Original languageEnglish
Pages (from-to)725-740
Number of pages16
JournalNonlinear Dynamics
Volume86
Issue number2
DOIs
StatePublished - 1 Oct 2016
Externally publishedYes

Keywords

  • ARM
  • Adaptive memory selection
  • Chaotic encryption
  • H.264 codec
  • H.264 data format protection
  • Multi-core multi-threading process

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