Architecture-dependent register allocation and instruction scheduling on VLIW

  • Lei Wang*
  • , Gui Chen
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Architecture-dependent optimization is very important for VLIW architecture. In this paper we have described a new architecture of VLIW - EPRC. And a new architecture-dependent optimization method based on micro-operation for exploiting the characteristics of target machine is described. The software bypassing based on static single-assignment is used to allocate pseudo registers, and the scheduling and register assignment algorithm with heuristics is adopted. Finally, the experimental results of Livermore and Whetstone are given.

Original languageEnglish
Title of host publicationICCET 2010 - 2010 International Conference on Computer Engineering and Technology, Proceedings
PagesV2292-V2296
DOIs
StatePublished - 2010
Event2010 2nd International Conference on Computer Engineering and Technology, ICCET 2010 - Chengdu, China
Duration: 16 Apr 201018 Apr 2010

Publication series

NameICCET 2010 - 2010 International Conference on Computer Engineering and Technology, Proceedings
Volume2

Conference

Conference2010 2nd International Conference on Computer Engineering and Technology, ICCET 2010
Country/TerritoryChina
CityChengdu
Period16/04/1018/04/10

Keywords

  • Architecture-dependent optimization
  • List scheduling
  • Software bypassing
  • VLIW

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