TY - GEN
T1 - An innovative experimental teaching method of hardware-software co-design-Taking a hardware accelerator of neural network using FPGA
AU - Li, Ying
AU - Liang, Jingzhuo
AU - Jie, Gui Shi
AU - Liu, Yangdong
AU - Huang, Wei
AU - Yan, Yue
AU - Liu, Xianglong
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - In order to cultivate students' software and hardware collaborative design thinking and system construction ability, this paper proposes an innovative experimental teaching method of software and hardware collaborative design to better develop students'sys-tem view. We create a student-centered learning environment and adopt a mixed teaching method whereby experiment courses are conducted in a 'traditional + discussion + scientific research-driven' manner. The course will focus on the design of the 'Convolutional Neural Network for Handwritten Digit Recognition', and run through curriculums that involve from software to hardware, algorithms to systems, and design to verification. We explore teaching methods that revolve around principles of using experiments to derive theories, and using theories to guide experiments. Besides, we establish an online laboratory that can provide an experiment platform (MOOE) for 'PC+ARM+FPGA', which realizes the seamless integration of physical operations, semi-physical emulators, and virtual models. Through investigation and research, most students who have completed this course have formed a good knowledge of computer systems and the necessary comprehensive development ability.
AB - In order to cultivate students' software and hardware collaborative design thinking and system construction ability, this paper proposes an innovative experimental teaching method of software and hardware collaborative design to better develop students'sys-tem view. We create a student-centered learning environment and adopt a mixed teaching method whereby experiment courses are conducted in a 'traditional + discussion + scientific research-driven' manner. The course will focus on the design of the 'Convolutional Neural Network for Handwritten Digit Recognition', and run through curriculums that involve from software to hardware, algorithms to systems, and design to verification. We explore teaching methods that revolve around principles of using experiments to derive theories, and using theories to guide experiments. Besides, we establish an online laboratory that can provide an experiment platform (MOOE) for 'PC+ARM+FPGA', which realizes the seamless integration of physical operations, semi-physical emulators, and virtual models. Through investigation and research, most students who have completed this course have formed a good knowledge of computer systems and the necessary comprehensive development ability.
KW - FPGA-based Accelerator
KW - MOOE
KW - Software-Hardware Collaboration
KW - Vertical Teaching
UR - https://www.scopus.com/pages/publications/85183012177
U2 - 10.1109/FIE58773.2023.10343303
DO - 10.1109/FIE58773.2023.10343303
M3 - 会议稿件
AN - SCOPUS:85183012177
T3 - Proceedings - Frontiers in Education Conference, FIE
BT - 2023 IEEE Frontiers in Education Conference, FIE 2023 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 53rd IEEE ASEE Frontiers in Education International Conference, FIE 2023
Y2 - 18 October 2023 through 21 October 2023
ER -