TY - GEN
T1 - An in-memory highly reconfigurable logic circuit based on diode-assisted enhanced magnetoresistance device
AU - Huang, Zhe
AU - Zhang, Yue
AU - Zhang, Kun
AU - Zhang, Zhizhong
AU - Wang, Jinkai
AU - Zhang, Youguang
AU - Zhao, Weisheng
N1 - Publisher Copyright:
© 2020 Association for Computing Machinery.
PY - 2020/9/7
Y1 - 2020/9/7
N2 - In the post-Moore era, in order to solve the problem of von Neumann bottleneck and memory wall caused by separation of memory and processor, in-memory-processing (IMP) technique has aroused great attention. Novel non-volatile memory (NVM) based on spintronic devices shows promise for satisfying the needs of low-power consumption and high speed for IMP. However, most spintronic memories based on magnetic tunnel junctions (MTJs) can only implement simple and specific logic functions due to the limits of single device and circuit structure. Otherwise, performing logic functions in memory generates vast dynamic power consumption during frequent reading and writing processes because of the high resistance of miniaturized MTJ. In this paper, we propose an in-memory highly reconfigurable logic circuit based on diode-assisted enhanced magnetoresistance (DEMR) device. Our circuit can realize 16 different logic functions with extremely limited circuit area benefiting from the special structure of DEMR device. With appropriate adjustment of control bit and current, the proposed circuit can further implement complex functions like full adder. The proposed reconfigurable circuit can flexibly meet the performance requirements in different scenarios and will contribute a lot for future in-memory chip design.
AB - In the post-Moore era, in order to solve the problem of von Neumann bottleneck and memory wall caused by separation of memory and processor, in-memory-processing (IMP) technique has aroused great attention. Novel non-volatile memory (NVM) based on spintronic devices shows promise for satisfying the needs of low-power consumption and high speed for IMP. However, most spintronic memories based on magnetic tunnel junctions (MTJs) can only implement simple and specific logic functions due to the limits of single device and circuit structure. Otherwise, performing logic functions in memory generates vast dynamic power consumption during frequent reading and writing processes because of the high resistance of miniaturized MTJ. In this paper, we propose an in-memory highly reconfigurable logic circuit based on diode-assisted enhanced magnetoresistance (DEMR) device. Our circuit can realize 16 different logic functions with extremely limited circuit area benefiting from the special structure of DEMR device. With appropriate adjustment of control bit and current, the proposed circuit can further implement complex functions like full adder. The proposed reconfigurable circuit can flexibly meet the performance requirements in different scenarios and will contribute a lot for future in-memory chip design.
KW - Diode-enhanced magnetoresistance
KW - Full adder
KW - In-memory-processing
KW - Reconfigurable circuit
UR - https://www.scopus.com/pages/publications/85091313550
U2 - 10.1145/3386263.3407587
DO - 10.1145/3386263.3407587
M3 - 会议稿件
AN - SCOPUS:85091313550
T3 - Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
SP - 259
EP - 264
BT - GLSVLSI 2020 - Proceedings of the 2020 Great Lakes Symposium on VLSI
PB - Association for Computing Machinery
T2 - 30th Great Lakes Symposium on VLSI, GLSVLSI 2020
Y2 - 7 September 2020 through 9 September 2020
ER -