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An FPGA Processor Combining Point Cloud and SNN for DVS-based ADAS Application

  • Wenjia Wang
  • , Hongwei Ren
  • , Wente Yi
  • , Kexun Cheng
  • , Lehao Tan
  • , Ying Cui
  • , Chen Li
  • , Bojun Cheng
  • , Biao Pan*
  • *Corresponding author for this work
  • Beihang University
  • The Hong Kong University of Science and Technology (Guangzhou)

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Automatic Emergency Braking (AEB) has become an important component in Advanced Driver Assistance Systems (ADAS) and a potential solution for AEB lies in the integration of Dynamic Vision Sensor (DVS) with Spiking Neural Network (SNN). A high-precision behavioural recognition algorithm called Spikepoint has been proposed by us, which combines Point Cloud with SNN to enable recognition of DVS event data. This work concentrates on the FPGA implementation of Spikepoint, aiming to improve real-time recognition capabilities. The deployment of Spikepoint on FPGA encounters two challenges: 1) Point Cloud processing introduces additional latency 2) Storing parameters that require to be accessed frequently from DDR introduces a significant time overhead. In order to address challenges aforementioned, a novel reference point-based filtering technique for Point Cloud is introduced. Meanwhile, a fine-grained quantization method and other optimization strategies are used on the neuron model. The Xilinx UltraScale+ is employed in the experiments conducted in this work. Our Point-based SNN Processor achieves a recognition frame rate of 92.08 FPS through the novel algorithm and corresponding hardware optimization, while achieving an accuracy of 94.3% on the DVS128 Gesture dataset.

Original languageEnglish
Title of host publicationISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350356830
DOIs
StatePublished - 2025
Event2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025 - London, United Kingdom
Duration: 25 May 202528 May 2025

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025
Country/TerritoryUnited Kingdom
CityLondon
Period25/05/2528/05/25

Keywords

  • FPGA
  • Point Cloud
  • Spiking neuron network
  • dynamic vision sensor
  • real-time recognition

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