Abstract
The separation of memory and computing units in the von Neumann architecture leads to undesirable energy consumption due to data movement and insufficient memory bandwidth. Energy-efficient in-memory computing platforms have the potential to address such issues. Due to its non-volatility and advantageous features over CMOS (such as low power, near-zero leakage current and high integration density), spin-based devices have been advocated for in-memory computing. This paper proposes a field-free Spin Orbit Torque (FF-SOT) MRAM based computing-in-memory (CiM) scheme that realizes XNOR/XOR logic and a cascading adder. This novel FF-SOT-CiM design does not require expensive peripheral circuits for computation while using the same memory cell design as a SOT-MRAM. Furthermore, FF-SOT-CiM does not require additional write cycles to save the result of its computations in the memory. The design offers higher write speed and; lower operating energy compared to CiM schemes based on other technologies; it also alleviates the source degeneration effect by leveraging an advanced switching mechanism. Extensive simulation results show that the proposed FF-SOT-CiM achieves up to 3.1x (2.6x) latency (energy) reduction compared to SRAM-based CiM, with negligible hardware overhead when performing in-memory XOR. ADD operations; the proposed FF-SOT-CiM can be to 5.0X and 1.5X faster and 3.4X and 1.1X more energy efficient than existing STT-based and FeFET-based schemes, respectively.
| Original language | English |
|---|---|
| Pages (from-to) | 331-342 |
| Number of pages | 12 |
| Journal | IEEE Transactions on Emerging Topics in Computing |
| Volume | 11 |
| Issue number | 2 |
| DOIs | |
| State | Published - 1 Apr 2023 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- Computing-in-memory
- full adder
- magnetic random access memory
- spin orbit torque (SOT)
- XNOR/XOR
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