An E-Band Frequency Quadrupler With Temperature Compensation Technique in 28-nm Bulk CMOS

Changwei Wang; Biao Deng; Mingjie Liu; Yan Wang; Dongfang Pan; Liguo Sun

doi:10.1109/LMWT.2025.3590704

An E-Band Frequency Quadrupler With Temperature Compensation Technique in 28-nm Bulk CMOS

Changwei Wang
, Biao Deng
, Mingjie Liu
, Yan Wang
, Dongfang Pan^*
, Liguo Sun^*

^*Corresponding author for this work

University of Science and Technology of China
Hefei University

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

This letter presents an E-band frequency quadrupler (FQ) implemented in 28-nm CMOS, featuring advanced temperature compensation to ensure consistent performance across a wide range of temperatures. The design employs dynamic adjustment of the push–push (PP) core’s transconductance (g_m) and the injection-locked (IL) core’s variable capacitance, achieving stable output power and frequency from −45 ◦C to 125 ◦C. By combining PP and IL architectures, the quadrupler achieves high efficiency (η) and power-added efficiency (PAE) with a small core area of 345 × 270 µm² . The measurement results demonstrate a 94% reduction in conversion gain (CG) variation, from 8.10 to 0.53 dB, and a peak CG of 4.58 dB at 80.9 GHz.

Original language	English
Pages (from-to)	1811-1814
Number of pages	4
Journal	IEEE Microwave and Wireless Technology Letters
Volume	35
Issue number	11
DOIs	https://doi.org/10.1109/LMWT.2025.3590704
State	Published - Nov 2025
Externally published	Yes

Keywords

CMOS
E band
frequency quadrupler (FQ)
injection locked (IL)
temperature compensation

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10.1109/LMWT.2025.3590704

Cite this

@article{219afde9d96e462ab5e507a2bfdd845c,

title = "An E-Band Frequency Quadrupler With Temperature Compensation Technique in 28-nm Bulk CMOS",

abstract = "This letter presents an E-band frequency quadrupler (FQ) implemented in 28-nm CMOS, featuring advanced temperature compensation to ensure consistent performance across a wide range of temperatures. The design employs dynamic adjustment of the push{\textendash}push (PP) core{\textquoteright}s transconductance (gm) and the injection-locked (IL) core{\textquoteright}s variable capacitance, achieving stable output power and frequency from −45 ◦C to 125 ◦C. By combining PP and IL architectures, the quadrupler achieves high efficiency (η) and power-added efficiency (PAE) with a small core area of 345 {\texttimes} 270 µm2 . The measurement results demonstrate a 94\% reduction in conversion gain (CG) variation, from 8.10 to 0.53 dB, and a peak CG of 4.58 dB at 80.9 GHz.",

keywords = "CMOS, E band, frequency quadrupler (FQ), injection locked (IL), temperature compensation",

author = "Changwei Wang and Biao Deng and Mingjie Liu and Yan Wang and Dongfang Pan and Liguo Sun",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.",

year = "2025",

month = nov,

doi = "10.1109/LMWT.2025.3590704",

language = "英语",

volume = "35",

pages = "1811--1814",

journal = "IEEE Microwave and Wireless Technology Letters",

issn = "2771-957X",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "11",

}

TY - JOUR

T1 - An E-Band Frequency Quadrupler With Temperature Compensation Technique in 28-nm Bulk CMOS

AU - Wang, Changwei

AU - Deng, Biao

AU - Liu, Mingjie

AU - Wang, Yan

AU - Pan, Dongfang

AU - Sun, Liguo

PY - 2025/11

Y1 - 2025/11

N2 - This letter presents an E-band frequency quadrupler (FQ) implemented in 28-nm CMOS, featuring advanced temperature compensation to ensure consistent performance across a wide range of temperatures. The design employs dynamic adjustment of the push–push (PP) core’s transconductance (gm) and the injection-locked (IL) core’s variable capacitance, achieving stable output power and frequency from −45 ◦C to 125 ◦C. By combining PP and IL architectures, the quadrupler achieves high efficiency (η) and power-added efficiency (PAE) with a small core area of 345 × 270 µm2 . The measurement results demonstrate a 94% reduction in conversion gain (CG) variation, from 8.10 to 0.53 dB, and a peak CG of 4.58 dB at 80.9 GHz.

AB - This letter presents an E-band frequency quadrupler (FQ) implemented in 28-nm CMOS, featuring advanced temperature compensation to ensure consistent performance across a wide range of temperatures. The design employs dynamic adjustment of the push–push (PP) core’s transconductance (gm) and the injection-locked (IL) core’s variable capacitance, achieving stable output power and frequency from −45 ◦C to 125 ◦C. By combining PP and IL architectures, the quadrupler achieves high efficiency (η) and power-added efficiency (PAE) with a small core area of 345 × 270 µm2 . The measurement results demonstrate a 94% reduction in conversion gain (CG) variation, from 8.10 to 0.53 dB, and a peak CG of 4.58 dB at 80.9 GHz.

KW - CMOS

KW - E band

KW - frequency quadrupler (FQ)

KW - injection locked (IL)

KW - temperature compensation

UR - https://www.scopus.com/pages/publications/105012120002

U2 - 10.1109/LMWT.2025.3590704

DO - 10.1109/LMWT.2025.3590704

M3 - 文章

AN - SCOPUS:105012120002

SN - 2771-957X

VL - 35

SP - 1811

EP - 1814

JO - IEEE Microwave and Wireless Technology Letters

JF - IEEE Microwave and Wireless Technology Letters

IS - 11

ER -

An E-Band Frequency Quadrupler With Temperature Compensation Technique in 28-nm Bulk CMOS

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Keywords

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