An Adaptive CFAR Detector Based on Binary Neural Network and its FPGA Implementation

Research output: Contribution to journalConference articlepeer-review

Abstract

The Constant False Alarm Rate (CFAR) algorithm is a method used for radar target detection. However, it is designed for specific clutter distributions and radar operation scenarios, which makes it challenging to guarantee detection performance in continuously changing environments. To overcome this limitation, this paper proposes an adaptive CFAR detector based on a binary neural network (BNN) to enhance radar target detection in various scenarios. BNN performs pattern recognition on the echo signal, judges the current operation environment of the radar, and guides the CFAR processor to choose the optimal detection algorithm for the corresponding scene. An energy entropy-based feature extraction algorithm is proposed to obtain the pattern feature map of the signal under different scenes through energy analysis. The simulation results demonstrate that the proposed feature extraction algorithm significantly improves the recognition accuracy and generalization ability of BNN, resulting in only a small performance loss compared to the full-precision parameter network. Finally, the CFAR detector is deployed on FPGA, and the experimental results show that BNN-CFAR significantly reduces memory usage and computational overhead during hardware implementation, achieving approximately 10 times network computational acceleration.

Original languageEnglish
Pages (from-to)736-742
Number of pages7
JournalIET Conference Proceedings
Volume2023
Issue number47
DOIs
StatePublished - 2023
EventIET International Radar Conference 2023, IRC 2023 - Chongqing, China
Duration: 3 Dec 20235 Dec 2023

Keywords

  • BNN
  • CFAR
  • FPGA implementation
  • feature extraction

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