TY - GEN
T1 - A reconfigurable arbiter PUF based on STT-MRAM
AU - Ali, Rashid
AU - Wang, You
AU - Ma, Haoyuan
AU - Hou, Zhengyi
AU - Zhang, Deming
AU - Deng, Erya
AU - Zhao, Weisheng
N1 - Publisher Copyright:
© 2021 IEEE
PY - 2021
Y1 - 2021
N2 - With the rapid development of the Internet of Things (IoT) infrastructure, electronic devices are becoming ubiquitous, in which authentication and secure communication are required. As a result, novel hardware security primitives have been developed to overcome the deficiencies of conventional security methods and address the growing security issues. Physical unclonable function (PUF) is an emerging hardware security primitive that plays an important role in authenticity and reliability of integrated circuits (ICs). Spin-transfer torque magnetoresistive random access memory (STT-MRAM) is a promising technology that is dense, fast, non-volatile, highly endurant and energy-efficient. STT-MRAM is considered a promising primitive as it has several intrinsic randomness sources, such as stochastic switching, process variations and statistical read/write failures. This paper proposes a novel hybrid STT-MRAM/complementary metal-oxide semiconductor (CMOS) based reconfigurable arbiter PUF. The functionality of the design is validated by a 28nm CMOS technology and a compact magnetic tunnel junction (MTJ) model. Simulation results show that the proposed PUF has a mean intra-hamming distance (HD) of 0.24%, a mean inter-HD of 51.1% and passes the National Institute of Standards and Technology (NIST) statistical tests.
AB - With the rapid development of the Internet of Things (IoT) infrastructure, electronic devices are becoming ubiquitous, in which authentication and secure communication are required. As a result, novel hardware security primitives have been developed to overcome the deficiencies of conventional security methods and address the growing security issues. Physical unclonable function (PUF) is an emerging hardware security primitive that plays an important role in authenticity and reliability of integrated circuits (ICs). Spin-transfer torque magnetoresistive random access memory (STT-MRAM) is a promising technology that is dense, fast, non-volatile, highly endurant and energy-efficient. STT-MRAM is considered a promising primitive as it has several intrinsic randomness sources, such as stochastic switching, process variations and statistical read/write failures. This paper proposes a novel hybrid STT-MRAM/complementary metal-oxide semiconductor (CMOS) based reconfigurable arbiter PUF. The functionality of the design is validated by a 28nm CMOS technology and a compact magnetic tunnel junction (MTJ) model. Simulation results show that the proposed PUF has a mean intra-hamming distance (HD) of 0.24%, a mean inter-HD of 51.1% and passes the National Institute of Standards and Technology (NIST) statistical tests.
KW - Hardware security primitive
KW - Identification
KW - PUF
KW - Process variations
KW - STT-MRAM
UR - https://www.scopus.com/pages/publications/85109011983
U2 - 10.1109/ISCAS51556.2021.9401053
DO - 10.1109/ISCAS51556.2021.9401053
M3 - 会议稿件
AN - SCOPUS:85109011983
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Y2 - 22 May 2021 through 28 May 2021
ER -