Skip to main navigation Skip to search Skip to main content

A novel SEU-tolerant MRAM latch circuit based on C-element

  • CNRS
  • Beihang University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Benefiting from its inherent hardness to radiation and non-volatility, magnetic random access memory (MRAM) is considered as one of the most promising non-volatile memory (NVM) technologies for aerospace and avionic electronics. However, MRAM is still sensitive to single event upsets (SEU) due to its CMOS employed peripheral circuit. In this paper, we propose a novel SEU-tolerant MRAM latch circuit, which is based on the special device C-element. By using a physics-based MTJ compact model and the 40nm design kit, hybrid simulations have been performed and simulation results show that the proposed MRAM latch circuit is immune to radiation effects.

Original languageEnglish
Title of host publicationProceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
EditorsJia Zhou, Ting-Ao Tang
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479932962
DOIs
StatePublished - 23 Jan 2014
Event2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014 - Guilin, China
Duration: 28 Oct 201431 Oct 2014

Publication series

NameProceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014

Conference

Conference2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
Country/TerritoryChina
CityGuilin
Period28/10/1431/10/14

Fingerprint

Dive into the research topics of 'A novel SEU-tolerant MRAM latch circuit based on C-element'. Together they form a unique fingerprint.

Cite this