A Novel Multi-Context Non-Volatile Content-Addressable Memory Cell and Multi-Level Architecture for High Reliability and Density

Currently, non-volatile content-addressable memory (NV-CAM) based on magnetic tunnel junction (MTJ) has huge potential in search applications, owing to its non-volatility, zero standby power and high speed. However, it still suffers from severe reliability and energy dissipation issues especially when the searched data information is large. To address these issues, we propose a multi-context cell (MCC) circuit by employing an output selector (OS) instead of a logic tree (LT) and a multi-level architecture (MLA) by employing SEN generators. In this proposed M-level NV-CAM (e.g., M=2), every M IT/2MTJ memory cells share one search circuit composed of a M-level selector, a pre-charge sense amplifier (PCSA), a OS and a math-line (ML) switch to improve area efficiency, and the search circuit together with M memory cells combine into a MCC. Moreover, the search-enable signal SEN influenced by ML can bring inessential search operations inactivity. Hybrid 40nm CMOS/MTJ simulation results show that the proposed MCC circuit can reach a lower search-error-rate (SER) of 0.5 % and a lower search delay of 39.45 ps compared with the previous (a) cell circuit with LT. On the other hand, the SER of searching a 144-bit data information in the proposed 2-1evel-architecture NV-CAM can be only 4.5 %, about 2.93 times lower than that in the traditional-architecture NV-CAM.