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A new FPGA PUF based on transition probability delay measurement

  • Zhenyu Guan
  • , Yuyao Qin*
  • , Junming Liu
  • *Corresponding author for this work
  • Beihang University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

By extracting the physical random differences produced in the manufacturing process on chip itself, a unique identification of any FPGA could be obtained with certain excitation, which has brought new opportunities to research and development of key generation and storage. Based on the transition probability method to measure the delay of LUT, this paper proposes a new PUF (Physical Unclonable Function) scheme. By choosing the LUT under measurement intentionally, such as 2D barcode, it realizes the multi-dimensional information utilization. An overlapping route comparison method is adopted in this scheme to measure the delay of a single LUT with high accuracy and low resource consumption, which has been significantly optimized compared to previous work in accuracy, granularity and resource consumption.

Original languageEnglish
Title of host publicationTrusted Computing and Information Security - 11th Chinese Conference, CTCIS 2017, Proceedings
EditorsFei Yan, Ming Xu, Shaojing Fu, Zheng Qin
PublisherSpringer Verlag
Pages66-75
Number of pages10
ISBN (Print)9789811070792
DOIs
StatePublished - 2017
Event11th Chinese Conference on Trusted Computing and Information Security, CTCIS 2017 - Changsha, China
Duration: 14 Sep 201717 Sep 2017

Publication series

NameCommunications in Computer and Information Science
Volume704
ISSN (Print)1865-0929

Conference

Conference11th Chinese Conference on Trusted Computing and Information Security, CTCIS 2017
Country/TerritoryChina
CityChangsha
Period14/09/1717/09/17

Keywords

  • LUT
  • Multi-dimensional information utilization
  • PUF (physical unclonable function)
  • Transition probability

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