A method of testability optimization based on BIT working mode considering the basic reliability

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Testability optimization is an important part of testability design. In the past, testability optimization design often neglects the correlation between testability and reliability and does not pay much attention to the influence of system reliability. Considering such circumstance, this paper studies the impact of the basic reliability of the system and the Built-In Test (BIT) working mode. Different optimization models for the testability design are established. A method of testability optimization based on BIT working mode considering the basic reliability is proposed. The fiber-optic inertia system is taken as an example to verify the method. The simulation proves the applicability and effectiveness.

Original languageEnglish
Title of host publication2017 Prognostics and System Health Management Conference, PHM-Harbin 2017 - Proceedings
EditorsBin Zhang, Yu Peng, Haitao Liao, Datong Liu, Shaojun Wang, Qiang Miao
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538603703
DOIs
StatePublished - 20 Oct 2017
Event8th IEEE Prognostics and System Health Management Conference, PHM-Harbin 2017 - Harbin, China
Duration: 9 Jul 201712 Jul 2017

Publication series

Name2017 Prognostics and System Health Management Conference, PHM-Harbin 2017 - Proceedings

Conference

Conference8th IEEE Prognostics and System Health Management Conference, PHM-Harbin 2017
Country/TerritoryChina
CityHarbin
Period9/07/1712/07/17

Keywords

  • Built-In Test
  • basic reliability
  • genetic algorithm
  • testability

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