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A fault recovery approach in fault-tolerant processor

  • Hongbing Li*
  • , Lihong Shang
  • , Jianxun Dang
  • , Huihua Jin
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A fault recovery scheme of a fault-tolerant processor for embedded systems is introduced in this paper. The microarchitecture of the fault-tolerant processor called RSED is modified from superscalar processor architecture. The fault-tolerant mechanism of RSED is implemented mainly using temporal redundancy technique. Fault recovery scheme is an important part of the fault-tolerant mechanism. In order to resolve the problem of possible single point of failures, a novel TMR approach is adopted to generate re-execution instruction address. Compared with similar works, the fault recovery scheme proposed can recover processor execution more reliably.

Original languageEnglish
Title of host publicationInternational Conference on Scalable Computing and Communications- The 8th International Conference on Embedded Computing, ScalCom-EmbeddedCom 2009
Pages52-57
Number of pages6
DOIs
StatePublished - 2009
EventInternational Conference on Scalable Computing and Communications- 8th International Conference on Embedded Computing, ScalCom-EmbeddedCom 2009 - Dalian, China
Duration: 25 Sep 200927 Sep 2009

Publication series

NameInternational Conference on Scalable Computing and Communications - The 8th International Conference on Embedded Computing, ScalCom-EmbeddedCom 2009

Conference

ConferenceInternational Conference on Scalable Computing and Communications- 8th International Conference on Embedded Computing, ScalCom-EmbeddedCom 2009
Country/TerritoryChina
CityDalian
Period25/09/0927/09/09

Keywords

  • Fault recovery
  • Fault tolerant
  • Temporal redundancy

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