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A DSP48-based reconfigurable 2-D convolver on FPGA

  • Wulun Wang*
  • , Guolin Sun
  • *Corresponding author for this work
  • Beihang University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Two-dimensional (2-D) convolution is a widely used operator exploited in image processing and computer vision. Many schemes of the FPGA-based 2-D convolver are focused on the buffer scheme and computational complexity. This paper optimizes the convolution unit from a unique perspective - underlying resource utilization, and presents a novel reconfigurable 2-D convolver. The purpose of this structure is to probe into the internal structure and resources of DSP blocks in FPGA and give full play to their computing power to complete convolution. This 2-D convolver can greatly reduce the consumption of logic resources without sacrificing the equivalent performance of convolution. The experiment results also demonstrate that this structure presents considerable adaptability to different sizes of images and kernels, making it suitable for various FPGA implementations.

Original languageEnglish
Title of host publicationProceedings - 2019 International Conference on Virtual Reality and Intelligent Systems, ICVRIS 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages342-345
Number of pages4
ISBN (Electronic)9781728150505
DOIs
StatePublished - Sep 2019
Event2019 International Conference on Virtual Reality and Intelligent Systems, ICVRIS 2019 - Jishou, China
Duration: 14 Sep 201915 Sep 2019

Publication series

NameProceedings - 2019 International Conference on Virtual Reality and Intelligent Systems, ICVRIS 2019

Conference

Conference2019 International Conference on Virtual Reality and Intelligent Systems, ICVRIS 2019
Country/TerritoryChina
CityJishou
Period14/09/1915/09/19

Keywords

  • Dig ital Signal Processing
  • Field-programmable gate arrays (FPGAs)
  • Re source utilization
  • Two-dimensional (2-D) convolution

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