A case of precision-tunable STT-RAM memory design for approximate neural network

Ying Wang; Lili Song; Yinhe Han; Yuanqing Cheng; Huawei Li; Xiaowei Li

doi:10.1109/ISCAS.2015.7168938

A case of precision-tunable STT-RAM memory design for approximate neural network

Ying Wang
, Lili Song
, Yinhe Han
, Yuanqing Cheng
, Huawei Li
, Xiaowei Li

School of Integrated Circuit Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

6 Scopus citations

Abstract

Multi-level STT-RAM cell is able to boost the memory density at the expense of read/write reliability. However, the induced data integrity issue in STT-RAM memory can be effectively masked by a wide spectrum of applications with intrinsic forgiveness, which belong to the specific domain such as multimedia, synthesis and mining. In this work, we leverage the reconfigurable capability of MLC STT-RAM to provide variable-precision data storage for popular machine learning architectures. The targeted STT-RAM memory design is able to transform between multiple work modes and adaptable to meet the varying quality constraint of approximate applications. Particularly, we demonstrate the concept of precision-tunable STT-RAM memory with the emerging Convolution Neural Network accelerators and elaborate on the data mapping policy in STT-RAM memory to achieve the best energy-efficiency.

Original language	English
Title of host publication	2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1534-1537
Number of pages	4
ISBN (Electronic)	9781479983919
DOIs	https://doi.org/10.1109/ISCAS.2015.7168938
State	Published - 27 Jul 2015
Event	IEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal Duration: 24 May 2015 → 27 May 2015

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2015-July
ISSN (Print)	0271-4310

Conference

Conference	IEEE International Symposium on Circuits and Systems, ISCAS 2015
Country/Territory	Portugal
City	Lisbon
Period	24/05/15 → 27/05/15

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

Machine Learning
Neural Network
STT-RAM

Access to Document

10.1109/ISCAS.2015.7168938

Cite this

Wang, Y., Song, L., Han, Y., Cheng, Y., Li, H., & Li, X. (2015). A case of precision-tunable STT-RAM memory design for approximate neural network. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015 (pp. 1534-1537). Article 7168938 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2015-July). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2015.7168938

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title = "A case of precision-tunable STT-RAM memory design for approximate neural network",

abstract = "Multi-level STT-RAM cell is able to boost the memory density at the expense of read/write reliability. However, the induced data integrity issue in STT-RAM memory can be effectively masked by a wide spectrum of applications with intrinsic forgiveness, which belong to the specific domain such as multimedia, synthesis and mining. In this work, we leverage the reconfigurable capability of MLC STT-RAM to provide variable-precision data storage for popular machine learning architectures. The targeted STT-RAM memory design is able to transform between multiple work modes and adaptable to meet the varying quality constraint of approximate applications. Particularly, we demonstrate the concept of precision-tunable STT-RAM memory with the emerging Convolution Neural Network accelerators and elaborate on the data mapping policy in STT-RAM memory to achieve the best energy-efficiency.",

keywords = "Machine Learning, Neural Network, STT-RAM",

author = "Ying Wang and Lili Song and Yinhe Han and Yuanqing Cheng and Huawei Li and Xiaowei Li",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; IEEE International Symposium on Circuits and Systems, ISCAS 2015 ; Conference date: 24-05-2015 Through 27-05-2015",

year = "2015",

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Wang, Y, Song, L, Han, Y, Cheng, Y, Li, H & Li, X 2015, A case of precision-tunable STT-RAM memory design for approximate neural network. in 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015., 7168938, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2015-July, Institute of Electrical and Electronics Engineers Inc., pp. 1534-1537, IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, 24/05/15. https://doi.org/10.1109/ISCAS.2015.7168938

A case of precision-tunable STT-RAM memory design for approximate neural network. / Wang, Ying; Song, Lili; Han, Yinhe et al.
2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 1534-1537 7168938 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2015-July).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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AU - Wang, Ying

AU - Song, Lili

AU - Han, Yinhe

AU - Cheng, Yuanqing

AU - Li, Huawei

AU - Li, Xiaowei

PY - 2015/7/27

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N2 - Multi-level STT-RAM cell is able to boost the memory density at the expense of read/write reliability. However, the induced data integrity issue in STT-RAM memory can be effectively masked by a wide spectrum of applications with intrinsic forgiveness, which belong to the specific domain such as multimedia, synthesis and mining. In this work, we leverage the reconfigurable capability of MLC STT-RAM to provide variable-precision data storage for popular machine learning architectures. The targeted STT-RAM memory design is able to transform between multiple work modes and adaptable to meet the varying quality constraint of approximate applications. Particularly, we demonstrate the concept of precision-tunable STT-RAM memory with the emerging Convolution Neural Network accelerators and elaborate on the data mapping policy in STT-RAM memory to achieve the best energy-efficiency.

AB - Multi-level STT-RAM cell is able to boost the memory density at the expense of read/write reliability. However, the induced data integrity issue in STT-RAM memory can be effectively masked by a wide spectrum of applications with intrinsic forgiveness, which belong to the specific domain such as multimedia, synthesis and mining. In this work, we leverage the reconfigurable capability of MLC STT-RAM to provide variable-precision data storage for popular machine learning architectures. The targeted STT-RAM memory design is able to transform between multiple work modes and adaptable to meet the varying quality constraint of approximate applications. Particularly, we demonstrate the concept of precision-tunable STT-RAM memory with the emerging Convolution Neural Network accelerators and elaborate on the data mapping policy in STT-RAM memory to achieve the best energy-efficiency.

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KW - Neural Network

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Wang Y, Song L, Han Y, Cheng Y, Li H, Li X. A case of precision-tunable STT-RAM memory design for approximate neural network. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 1534-1537. 7168938. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2015.7168938

A case of precision-tunable STT-RAM memory design for approximate neural network

Abstract

Publication series

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UN SDGs

Keywords

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