Abstract
The calculation principle of non‑positional stochastic number (SN) is a promising technique for realizing high‑performance computing owing to its extremely low hardware cost. This paper introduces detailly the origin, develop-ment process and the domestic and foreign development present situation. However, a disadvantage of stochastic bitstream is that the computing latency, and information‑carrying efficiency and so on. We presented a hybrid stochastic computing (HSC) based on a hybrid bitstream to solve these problems, which achieves a lower hardware cost, better accuracy, and fast-er speed. The HSC neural networks is fabricated by 40 nm low‑power CMOS process, with a core area of 0.73 mm × 0.73 mm, power of 102.3 mW and clock of 400 MHz, which has 4 544 multiply and accumulation (MAC). The proposed Hybrid stochastic computing is tested by FPGA and ASIC. Compared with other stochastic computing method, the method proposed gains 50×, 2.5×,and 3.26× energy efficiency than other methods of traditional stochastic computing.
| Translated title of the contribution | Stochastic Computing and Hybrid Stochastic Computing |
|---|---|
| Original language | Chinese (Traditional) |
| Pages (from-to) | 428-440 |
| Number of pages | 13 |
| Journal | Tien Tzu Hsueh Pao/Acta Electronica Sinica |
| Volume | 52 |
| Issue number | 2 |
| DOIs | |
| State | Published - Feb 2024 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
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